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1 technical data LD1207 description the ld12 0 7 i s speci fical l y desi g n ed for le d and led dis p l ay deri vers. the ld12 0 7 h a ve 12/ 9 segm ent ou t p ut l i n es, 7 t o 4 gri d o u t p ut l i nes, o n e di spl a y m e m o ry , cont rol ci rcui t a nd 3 l i ne s e rial da t a i n t e rface. th is fun c tio n are all in co rp o r ated in t o a si n g l e ch ip t o bu il d a h ig hly reliab l e p e rip h e r a l devi ce for a si ngl e chi p m i cr ocom put er. it i s ve ry conveni ence t o cont rol for n u m e ric di spl a y . ld12 0 7 ?s pi n assi gnm ent s and appl i cat i on ci rcui t ar e opt i m ized for easy pc b lay out and cost savi n g advant ages. features c mos technology s egm e nt o u t pu t l i ne se lect io n b y com m and : 12 ~ 9 g rid o u t pu t l i ne se lec t ion b y com m a nd : 7 ~ 4 o perati on v o l t age : 5v l ow po wer consum pt io n 8 -s tep dim m i ng co n t ro l b y com m a nd s erial inte rface for cloc k, data input, strobe pins 2 4-pin, sop package appl ication s egm e nt led disp la y : vcr, dvd, mwo
2 technical data LD1207 block diagram seg m ent driver / grid driver serial data interface osc display me m o ry control ti mi ng generator di mming ci rcuit sg1 sg2 sg3 p i n conf iguration sg4 din sg5 sg6 vdd clk st b sg7 sg8 sg9 sg10/gr7 sg11/gr6 r os c sg12/gr5 gr4 gr3 gnd gr2 gr1 gnd gnd vdd sg12/gr5 sg11/gr6 sg10/gr7 sg9 sg8 gnd gr1 gr2 gr3 gr4 sg1 sg2 sg3 sg4 sg5 sg6 sg7 os c din clk st b vdd 6 7 8 9 10 11 12 1 2 3 4 5 19 18 17 16 15 14 13 24 23 22 21 20
3 technical data LD1207 pin descriptio n pin na me osc din clk stb vdd sg1 to sg9 sg10/gr7 to sg12/gr5 gnd gr4 to gr1 i/o i i i i - o o - o description pin no. oscillator input pin. a resistor is conne ct ed to this pin and gnd. 1 data input pin. this pin inputs serial da t a at the rising edge of the shif t clock (staring from the lower bit) 2 clock input pin. rising edge trigger. 3 strobe pin for serial interface. the data input af ter the stb has fallen is processed as a command. when this pin is ?high ? , clk is ignored. 4 power supply 5,18 segment output pins(p -channel, ope n drain) 6~14 segment output pin/ grid output pin (cmo s output) 15~17 ground pin 19,24 grid output pins (n-channel, open dr ain) 20~23
4 technical data LD1207 functional description commands a command is the first byte (b0 to b7) inputted to LD1207 vi a din pin after stb pin has changed from ?high? to ?low? s tat e . if for some reason the stb pin is set ?high? while dat a or comma nds are being transmitted, the serial comm unication is initialized, and the data/commands being transmitted are considered i nvalid. command 1 : dis p laymode set t ing commands LD1207 provides 4 display mode set t i ng as show n in the di agra m below: as stated e a rlier a comma nd is the first one byte(b0 to b7) trans m itt e d to LD1207 via the din pin when s t b is ? l ow?. however, for t h ese comma nds, bit no.3 to bit no.6(b2 to b5) are ignored, bit no.7 & bit no.8(b6 to b7) are gi ven a value of ?0?. the display mode setting commands deter m ine th e nu mbe r of segment s and grids be used (1/4 to 1/7 duty, 12 to 9 segments). when thes e commands are execut ed, the display forcibly turned off. a display comma nd ? on? must be exe c ut ed in order to resume display. if the sa me mode setting is selected, no comma nd execution is take place, ther ef ore, nothing happens. when power is turned ?on?, the 7- grid, 9-segme n t mode is selec t ed. lsb msb 0 - - - - b1 b0 0 display mode settings : 00 : 4 grids, 12 segment s 01 : 5 grids, 11 segment s 10 : 6 grids, 10 segment s 11 : 7 grids, 9 segment s don?t care
5 technical data LD1207 command 2 : data set t ing commands the dat a se tting comm ands execut e s the dat a wr ite mode for LD1207. the dat a setting command, t h e bits5 and 6 (b4, b5) ar e ignored, bi t7(b6) is given t he value of ?1? w hil e bit8(b7) is given the value of ?0?. pleas e refer t o the di agram below. when powe r is turned o n , bit 4 to bi t 1 (b3 to b0) are given t h e v alue of ?0?. lsb msb 0 1 - - b3 b2 b1 b0 data w r it e mode settings : 00 : w r ite data to display mode don?t care address incre m ent mode settings (display mode): 0 : increment addres s aft e r data has been w r itt en 1 : fixes address mode settings : 0 : nor m al operation mode 1 : test mode
6 technical data LD1207 command 3 : address set t i ng commands address setting comma nds are used to set the address of the display me mory. the a ddress is considered valid i f i t has a value of ? 00h? t o 0 dh?. if the address is set to 0eh or hi gher, the data is ignored until a va lid addre ss is set. when power is turned on, the address is set at ?00h?. please refer to the di agram below. lsb msb 1 1 - - b3 b2 b1 b0 address : 00h to 0dh don?t care display mode and ram address data tr ansmitted from a n external devic e to LD1207 via the serial int e rface ar e stored in the display ram and are a s signed addresses. th e ram addresses of LD1207 are given below in 8 bit unit. sg4 s g5 sg8 s g9 sg12 sg1 dig1 00h l 04h u 00h u 05h l 01h l 02h u 03h l 02h l 04h l 06h u 07h l 06h l 08h u 09h l 08h l 0ah u 0bh l 0ah l 0ch u 0dh l 0ch l dig2 dig3 dig4 dig5 dig6 dig7 b3 b4 b7 b0 xxh l xxh u lower 4 bits higher 4 bits
7 technical data LD1207 command 4 : display control commands the display control comma nds are used to turn on or o ff a display. it also used to set the pulse width. please refer to the di agr a m be low. when the power is turned on, a 1/16 pulse width is selected and the displayed is turned off. lsb msb 1 0 - - b3 b2 b1 b0 dimming quantity settings : 000 : pulse width = 1/16 001 : pulse width = 2/16 010 : pulse width = 4/16 011 : pulse width = 10/16 100 : pulse width = 11/16 101 : pulse width = 12/16 110 : pulse width = 13/16 111 : pulse width = 14/16 don?t care display settings : 0 : display off 1 : display on
8 technical data LD1207 display timing w aveform sg output dig1 dig2 dig3 dig4 -------- dign dig1 g1 g2 g3 g4 gn ------- t d i s p l ay =500us
9 technical data LD1207 switching characterist ic waveform LD1207 switching char act eristies w a v efor m i s given below. f os c osc pw stb stb clk din 10% 90% pw clk t setup t ho l d t cl k-st b 90% 10% t tzh t tlz t thz pw clk t tzl gn sn pw clk (clock pulse wi dth) 400ns t setup (data setup ti me) 100ns t clk-stb (cl o ck - s trobe ti me ) 1 ? t tzh (rise ti me) 1 ? t tzl <1 ? pw st b (strobe pulse width) 1 ? thold ( data hold time) 100ns t thz (fall ti me) 10 ? f o sc = oscillation frequency t tlz <10 ?
10 technical data LD1207 serial commumi cation form at the fol l owi ng diagra m show s the ld 1207 serial communic ation for m a t . re c e pt ion ( d ata/command write) if dat a conti nues. stb din b0 b1 b2 b6 b7 1 23 78 clk
11 technical data LD1207 aplications display me mory is updated by in cr e m enting addresses. please re fer to the following diagra m. c o mm and1 c o mm and2 c o mm and3 dat a 1 dat a 2 c o mm and4 - - - --- -- -- --- -- --- -- - - - - --- -- -- --- -- --- -- - stb clk din w h ere : command 1 : display mo de setting command 2 : data setting command comma nd 3 : address setting comma n d dat a 1 to n : transfer display dat a (14 bytes max.) comma nd 4 : display control comma n d the fol l owi ng diagra m show s the wave for m s when updat i ng specifi c a ddresses. co mman d 2 co mman d 3 data co mman d 3 data stb din clk where : comma nd 2 -- da ta setting command comma nd 3 -- address setting comma n d dat a -- display data
12 technical data LD1207 recommended software programming flowchart start se t com m and 1 se t com m and 2 se t com m and 3 clear display ram (see n o te 5) se t com m and 4 main p r ogram se t com m and 1 se t com m and2 se t com m and 3 se t com m and 4 initial set t ing main loop end no te : 1. co m m an d 1 : di spl a y mo d e setting 2. co m m an d 2 : data setting c o mman d s 3 . c o m m and 3 : a ddr ess set t i ng c o m m a nds 4 . c o m m and 4 : di sp l a y c ont ro l c o m m a nds 5 . w h en ic p o wer i s appl i e d for t h e fi rst t i m e, t h e cont ent s of t h e di sp l a y r a m ar e not defi ned : t h u s , i t i s stro ng ly sug g e st ed th at th e co nten ts o f th e disp lay ram m u st b e cl e a r e d d u r ing t h e in i tial setting.
13 technical data LD1207 sop 24l (300 mil) thermal performan c e in still air junction temperature : 100 1200 96 6 61 6 ic mounted glass epoxy pcb ic single 1000 power dissipation, pd (mw) 800 600 400 200 0 -25 0 25 50 75 100 am bi ent te mperatur e, ta ( )
14 technical data LD1207 absolute maximum ratings (unles s otherwise stated, ta=25 , gnd=0v) para met e r supply voltage logi c input voltage driver output current/pin maxi m u m driver output current/ t otal sym bol v dd vi itotal iohsg rating units -0.5 to +7.0 v -0.5 to v dd + 0.5 v 400 -50 ma ma + 250 ma iolgr recommended operating range (unless otherwise stated, ta= -20 to +70 , gn d=0v) para met e r logi c supply voltage dyna mic current (see note) high-level input voltage low-leve l input voltage sym bol v dd i dddyn v ih vil min. 4.5 . 0.8v dd 0 typ. 5 . . . max. unit 5.5 v 5 ma v dd v 0.3 v dd v note : test condition : set display control comma nds = 80h (display turn off s t at e)
15 technical data LD1207 electrical characteristics (unles s otherwise stated, v dd =5v, gnd=ov, ta=25 , sym bol test conditi on i ohsg1 min. typ. max. unit para met e r v o = v dd -1 v sg1 to sg9. sg10/gr7 t o sg12/gr5 i ohsg2 v o = v dd -2 v sg1 to sg9. sg10/gr 7 t o sg12/gr 5 -10 -14 -30 ma high-level out put c u rrent i olgr -20 -25 -50 ma v o = 0. 3v gr1 to g r 4. sg10/gr7 t o sg12/gr5 i tolsg low-level out put c u rrent 100 140 - ma v o = v dd -1 v sg1 t o sg9. sg10/gr7 t o sg12/gr5 v ih segm ent high-level out put c u rrent toler a nc e - - 5 % - v il high-level in pu t vo ltag e - - v 0. 8vdd low-level in pu t vo ltag e . - v 0. 3vdd - oscillatio n frequency 350 500 650 khz f os c r = 5 1 kom s
16 technical data LD1207 application circuit gnd vdd sg12/gr5 sg11/gr6 sg10/gr7 sg9 sg8 gnd gr1 gr2 gr3 gr4 sg1 sg2 sg3 sg4 sg5 sg6 sg7 os c din clk st b vdd s6 s7 s1 s2 s3 s4 s5 mcu g1 g2 g3 g4 s9 s8 s12 s11 s10 g1 g2 g3 g4 s6 s7 s1 s2 s3 s4 s5 s8 s9 s10 s11 s12 seg1 seg2 seg3 seg4 seg5 seg6 seg7 digit1 digit2 digit3 digit4 seg8 seg9 seg10 seg11 seg12 4-grid x 12-segment (common cahode) +5v +5v 51k 0. 1p f note : the c a pa citor (0.1 uf) connect ed between t h e gnd and vdd pins must be lo c a ted as ne ar a s possible to t h e LD1207 chip. com m on cathode typ e led panel a b c d e f g h seg 1 com / digital(grid) a seg 2 seg 3 b f g seg 4 seg 5 c e seg 6 d h seg 7 seg 8
17 technical data LD1207 pack age d imensions(24sop) d su f f i x so i c (m s - 0 1 3 a d) sy m b o l m i n m a x a 1 5. 2 0 15 . 6 0 b7 . 4 0 7 . 6 0 c2 . 3 5 2 . 6 5 d0 . 3 3 0 . 5 1 f0 . 4 0 1 . 2 7 g h no t e s : j0 8 k0 . 1 0 0 . 3 0 2. m a x i m u m m o l d f l a s h o r p r o t r u s i o n 0. 15 m m ( 0 . 006) p e r s i d e m0 . 2 3 0 . 3 2 fo r a ; fo r b ? p 1 0. 0 0 10 . 6 5 r0 . 2 5 0 . 7 5 1. 27 9. 53 di m e n s i o n , m m a b h c k c m j f m p g d r x 45 se a t i n g pl a n e 0 . 25 ( 0 . 0 10 ) m t -t - 1 24 12 13

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